As is known, generally a circuit integrated in a substrate communicates and interacts with the outside world by means of pads, i.e., portions of conductive material onto which other electronic devices may be coupled, such as, for example, other integrated circuits grown on the substrate, or else external electronic devices.
In detail, each pad represents alternatively a termination of a corresponding line for carrying signals internal to the integrated circuit, or else a power supply point of the integrated circuit itself, to which it is possible to connect supply circuits.
In the presence of a number of integrated circuits, pads of different integrated circuits may be coupled to one another, for example by wire bonding, or else by projecting contact regions (bumps), so as to create corresponding connections between the integrated circuits. In either case, there are set up one or more low-impedance resistive paths, whereby the integrated circuits are set in electrical contact.
In the case of a system in package (SiP), i.e., of an electronic device comprising, inside one and the same package, at least two integrated circuits and, possibly, passive components, the integrated circuits of the SiP are electrically coupled through their own pads. In addition, pads of different integrated circuits may be electrically coupled by means of so-called “through silicon vias” (TSVs).
Given a first integrated circuit grown on a substrate of semiconductor material and having a bottom surface and a top surface, a TSV is formed by a hole having a substantially cylindrical shape or shaped like a truncated cone, which passes through the substrate and extends from the top surface to the bottom surface. The hole is filled with electrically conductive material, i.e., material with a high electrical conductivity G, and is insulated from the semiconductor material for example by means of an oxide coating in such a way that the TSV will provide a low-impedance resistive path designed to be traversed by an electric current.
Generally, the TSV contacts, in a top portion of the first integrated circuit, metal regions that overlie the substrate and that provide the pads of the integrated circuit. In this way, the pads may be set in electrical or ohmic contact, for example, with one or more pads of a second integrated circuit, set underneath the first integrated circuit. In this way, it is possible to obtain a stacked structure of integrated circuits, which are electrically coupled to one another.
The TSVs are also used for connecting integrated circuits within the so-called “systems on chip” (SoCs), i.e., monolithic electronic systems, each comprising two or more integrated circuits, which provide corresponding microelectronic components (memories, processors, graphic accelerators, etc.).
Irrespective of the type of electronic device in which they are inserted, TSVs may present certain drawbacks.
In particular, TSVs may be subject to considerable parasitic phenomena (leakage currents, parasitic inductances and capacitances, etc.), which render their electrical behavior non-ideal. In addition, each TSV provides a connection between the first and second integrated circuits, but in general the connection is not shared by other integrated circuits, with the consequence that, in the case of complex electronic systems (for example, SoCs with numerous microelectronic components), there is the need for multiplication of the TSVs necessary for providing the required connections, with consequent increase in the space occupied by the TSVs and the need to reduce the dimensions (diameter) of the TSVs themselves. Typically, the diameter of the TSVs may be reduced up to some ten microns. However, this reduction entails an increase of the parasitic phenomena, is the reason for mechanical brittleness of the TSVs, and renders testing thereof difficult.
In addition, TSVs are typically provided by means of somewhat complex production processes, given the need to insulate each TSV electrically from the surrounding semiconductor, and to provide a through hole. In particular, given a wafer of semiconductor material, typically the TSVs are created by means of chemical etching following upon formation, in the wafer, of the integrated circuits. In addition, the creation of the TSVs is followed by an operation of reduction of thickness or grinding of the bottom surface of the wafer (operation known as “back grinding”) in order to render the vias through silicon vias. This operation inevitably entails a reduction in the thickness of the wafer. Hence, in order to prevent breaking of the wafer, before the grinding operation a protective layer, having the function of bestowing mechanical stiffness on the wafer, is laid on the top surface of the wafer, to which the protective layer is attached by interposition of an adhesive layer.